Electronic circuitry generally requires a stable supply of electrical energy to function properly. Power is typically provided from a source that is set or is settable to one or more voltage levels, such as +3.3 volts (V) and the like. Current is drawn from the respective voltage level to meet the specified requirements of devices in the circuit. The devices can operate at a variety of modes, with each mode associated with a different level of energy consumption.
A refreshed circuit device includes an operational mode and a refresh mode, with the operational mode relating to its operational interaction with other circuitry and the refresh mode relating to actions taken place to maintain the device in a given state. For example, dynamic random access memory (DRAM) provides an array of storage cells that store electrical charge in order to serve as a memory space for digital data. Data are read from and written to the various cells to carry out a data transfer operation with other circuitry.
The storage cells lose the stored charge at a given decay rate, being sometimes characterized as “leaky capacitors.” For this reason, the cells must be recharged, or “refreshed,” from time to time in order to maintain a given logical memory state. Some memories invoke a self-refreshing cycle whereby the memory reads the present state of the array of storage cells and then rewrites that same state to the array. By refreshing the array at a rate faster than the decay rate, the logical state is maintained in the memory.
A minimum operating current is specified for a particular memory that is necessary to sustain all the memory operations; that is, to sustain the memory during operations associated with both the standard and the refresh modes. Typically, the memory will also be rated for operation within a specified voltage range. The standard operating mode typically requires relatively more power in comparison to the refresh mode. This means that under certain conditions and arrangements it might be possible to save power when operating in the refresh mode for extended periods of time associated with low utilization of the memory. What is needed is a solution that optimizes memory availability for system reliability, as well as minimizing power consumption for extended battery life. It is to these improvement features that the embodiments of the present invention are directed.